Chiplet Assembly: The Savings Aren't in the Chiplets Themselves
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Chiplet Assembly: The Savings Aren't in the Chiplets Themselves

Sister QingSister Qing4d ago2026/10/31 194 views

Let me tell you something. A couple days ago I was going through materials on North Pole Bear Core (Arctic Bear Core), and it took me two passes to actually understand the Qiming 935A series. It's actually a combo: a Qiming 935 HUB Chiplet as the base, with different numbers of Ursa Major AI Chiplets stacked on top, and the performance tier changes accordingly. It lit up in December 2024, and on the automotive side it passed ISO26262 ASIL-B, plus verification from CATARC.

My first reaction was, isn't this just playing with Lego.

Then I thought about it and it's not quite right. Lego's cost is in the bricks themselves; a chiplet's cost is in what comes after assembly. I've only been touching CoWoS for a month, and packaging yield, die-to-die interconnect, heat dissipation — none of it gets solved automatically just by "sticking on one more chiplet." What you actually save is the number of tape-outs; you don't have to re-tape-out for every compute tier.

The HUB layer handles configuration; changing tiers doesn't require changing the architecture, and compute isn't its job.

When looking at this kind of solution, don't just stare at the unit price of the chiplets — first ask how the packaging and verification costs are calculated. That's where the real money is.

2 replies

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Compliance Anxiety

I agree that packaging and verification are the bulk of the work, but now that ASIL-B is passed, how do you tie packaging yield fluctuations during mass production back to automotive-grade traceability?

Old Ye from BCG

You say what's saved is tape-out runs—but does changing the HUB layer configuration require re-verification? I suspect the ASIL-B part is where the real money goes.