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Lingrui Zhixin Funding Round: I Back the RISC-V Route [Opinion]

TiangongTiangongJul 102026/07/10 82 views

Spent the weekend reading closely about Lingrui Zhixin completing a funding round worth hundreds of millions of yuan. More than the amount itself, I'm focused on how agent scenarios are redefining CPU architecture. This time, I'm backing the RISC-V route, for the following reasons.


1. Control-intensive architectures are regaining influence

Looking at industry trends, the evolution from "conversational AI" to "executive AI" means a large number of tasks require CPUs to handle complex control flows, interrupts, and context switching. GPUs handle parallel computing, but workloads like scheduling, multimodal interaction, and security isolation ultimately rely on CPUs. Lingrui Zhixin's main pitch—an "agent-native" CPU core—hits exactly this pain point. Nvidia uses over 1 billion RISC-V cores annually in its AI chips; this number alone demonstrates big players' recognition of RISC-V as a control core.

2. SMT4 technology is key to differentiation

The article mentions that P100 v1 is the only RISC-V CPU core in China supporting dynamic simultaneous multithreading (SMT4). In server-grade CPUs, SMT is a mature method for improving concurrent throughput, but the RISC-V ecosystem has lacked such a mature implementation. The fact that Lingrui Zhixin can achieve SMT4 indicates their microarchitecture design capabilities have moved beyond theoretical verification into engineering implementation. This holds more commercial value than simply stacking core counts.

3. Investor portfolio sends signals

Zhangjiang Hi-Tech, CAS Star, Biren Technology—a mix of state-backed capital and upstream/downstream industry participants. Such combinations usually mean the technical route has received supply-chain-level endorsement. Compared to pure financial investment, industrial capital values long-term synergy more. Lingrui Zhixin completed multiple funding rounds within just over a year of founding; the tight financing pace shows the market's hunger for high-performance RISC-V CPUs is indeed high.


One thing I'm particularly watching: Lingrui Zhixin has currently raised hundreds of millions, but R&D and tape-out costs for high-performance RISC-V CPUs are extremely high. Nvidia, SiFive, and Alibaba's T-Head are all investing heavily in this direction. The question Lingrui Zhixin needs to answer is—in the winner-takes-all market of server-grade CPUs, can its differentiated advantages support an independent third-party ecosystem position?

Feel free to share your views.

https://www.leiphone.com/category/chips/VDznXjjFyrxdB0TG.html

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Pan Xueting

SMT4 is indeed a hard metric, but as an SRE, I care more about the reliability and fault isolation capabilities of this new kernel. The maturity of the RISC-V ecosystem currently cannot support the availability requirements of core trading systems; any upstream errata could directly turn into a P0 incident. I suggest waiting for their stress test and fault injection reports after tape-out.

Brother Yuan
Brother YuanJul 21(edited)

[quote="tiangong, post:1, topic:273"]

Over the weekend, I carefully read the news about Lingrui Zhixin completing hundreds of millions in funding. More than the amount raised, I'm focused on how agent scenarios redefine CPU architecture. This time, I'm backing the RISC-V route, for the following reasons.


1. Control-intensive architectures are regaining influence

Looking at industry trends, the evolution from "conversational AI" to "executive AI" means a large number of tasks require CPUs to handle complex control flows, interrupts, and context switching. GPUs handle parallel computation, but scheduling, multimodal interaction, and security isolation ultimately rely on CPUs. Lingrui...

[/quote]

From an industry cycle perspective, RISC-V penetration in server-grade CPUs is still low, but Lingrui Zhixin's SMT4 and entry into agent scenarios give it a window for valuation repair. The key is whether they can grab OEM customization orders in the gap between NVIDIA and T-Head.