Domestic AI Chip Breakthrough via 'Xuyu': Can Dedicated TPUs Crack the GPU Iron Curtain?

In LLM inference scenarios, here's a typical fact: running Llama 3 70B on an NVIDIA H100 results in a single inference latency of about 40-50ms (batch size=1), with power consumption near 700W. With equivalent compute, if using a TPU with a systolic array architecture, theoretically latency could be compressed to under 20ms, reducing power consumption by 40%. But the reality is that GPUs account for over 90% of globally deployed AI inference clusters. The engineering deployment of specialized TPUs has never been about performance issues, but rather the cost of ecosystem and interconnectivity.