Physix FrontierPhysix Frontier · News Briefing Card (QbitAI · Sep 19, 2026)
Huawei Unveils Ascend 960, Sets Annual AI Chip Cadence
KEY FACTS
- Ascend 960DT R&D was accelerated by three quarters, achieving 2 PFLOPS of FP8 compute per chip.
- A 4,096-card supernode was launched, improving cluster MFU by 2.75x over traditional eight-card servers.
- It is the industry's first system to adopt NPO optical interconnect technology, reducing power consumption by over 550 kW.
- The CANN ecosystem has over 5,200 monthly active developers, with external developers accounting for 61%.
- Huawei plans to maintain an annual release cadence, launching the Ascend 970 in 2028 and the 980 in 2029.
KEY DATA
2 PFLOPSFP8 Compute Per Chip
4,096 NPUsSupernode Scale
2.75xMFU Improvement Factor
5,200+CANN Monthly Active Developers
PHYSIX OBSERVATION
Huawei is shifting from single-chip competition to exporting systems engineering capabilities. Amidst advanced process node restrictions, it compensates for individual chip limitations through NPO optical interconnects and supernode architectures, maintaining compute supply elasticity via a high-frequency 'one generation per year' iteration cycle. This strategy aims to build a self-controlled AI infrastructure foundation, providing stable compute support for domestic large model training independent of overseas supply chains through open-source software ecosystems and hardware scaling synergy.
Source: QbitAI report